1. Field of the Invention
The present invention relates to a semiconductor device including an electrically rewritable nonvolatile memory cell.
2. Description of the Related Art
As one of electrically rewritable semiconductor memories, a NAND type flash memory is known. Since the NAND type flash memory is advantageous to miniaturization, its capacitance is being increased.
In order to miniaturize the NAND type flash memory, it is expedient that a tunnel gate insulating film or a gate interelectrode insulating film (hereinafter, IPD film) is thinned. However, it is difficult to proceed the thinning because a data retention characteristic should be secured.
In the case of IPD film, in order to secure a capacitance without the thinning as shown in FIGS. 1A and 1B, a capacitor area is increased by three-dimensional capacitor structure so as to cope with the miniaturization of the NAND type flash memory. FIG. 1A is a cross-section view of a word line direction (channel the second layer width direction), and FIG. 1B is a cross-section view of a direction (channel length direction) perpendicular to the word line direction. In the drawings, 10 designates a silicon substrate, 11 designates an isolation insulating film for trench type isolation (STI), 12 designates a tunnel gate insulating film, 13 designates a source/drain region, 14 designates a floating gate electrode, 15 designates an IPD film, 16 designates a control gate electrode and 17 designates a premetal dielectric film (PMD film).
When the miniaturization is further advanced, as shown in FIGS. 2A and 2B, a space between device elements becomes extremely narrow even in the case where the three-dimensional capacitor structure is adopted. Particularly as is clear from a cross-section view in the word line direction of FIG. 2A, the width of the control gate electrode 16 put into between the floating gate electrodes 14 becomes very small. The control gate electrode 16 is now reaching a geometric limit.
Before reaching the limit, the manufacturing processes such as a process for filling the control gate electrode 16 and a process for processing the control gate electrode 16 become very difficult. As a result, voids are generated in the control gate electrode 16 and thus resistance rises.
When the space between the floating gate electrodes 14 becomes narrow, the control gate electrode 16 becomes thin. Therefore, when the control gate electrode 16 is formed of a polycrystalline silicon film, it is difficult to diffuse sufficient dopant (for example, phosphorus) into the polycrystalline silicon film. Thereby, the function of the control gate is impaired.
When the thinning of the IPD film 15 is realized, it can first reach the limit. However, if leak current passing through the IPD film 15 increases due to the thinning of the IPD film 15, the function of the nonvolatile memory is impaired. Therefore, thin IPD films which can be used as the IPD film 15 are very limited.
An SiO2/Si3N4/SiO2 laminated film (hereinafter, ONO film) is a typical laminated film which is used as the IPD film, but the use of substances having high-permittivity such as Al2O3 and HfO4 instead of Si3N4 is proposed (Jpn. Pat. Appln. KOKAI Publication No. 2002-319583). The use of the substances having high-permittivity is effective for extending the limit of miniaturization, namely, for maintaining the capacitance and thinning an average electronically equivalent film thickness. This is not, however, effective for solving difficulty in filling the control gate electrode 16 into a space between the floating gate electrodes 14 which will become further narrower in the future.